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projekte:sonos-play5 [2018-09-16 21:18] – [Hardware] jn | projekte:sonos-play5 [2018-09-17 00:04] (current) – Mimoja | ||
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* je 128Mbit SDRAM https:// | * je 128Mbit SDRAM https:// | ||
* Oszillator 100MHz | * Oszillator 100MHz | ||
+ | * Konnektor J25004, UART, 38400 baud | ||
+ | * pin 2: TX | ||
* Mini-PCI-Slot für WLAN (J25000) | * Mini-PCI-Slot für WLAN (J25000) | ||
* Großes HF-Shield mit Flash (HW25001) | * Großes HF-Shield mit Flash (HW25001) | ||
Line 41: | Line 43: | ||
* blank = Standard Packing | * blank = Standard Packing | ||
* Oszillator TEUMCK 11.289 (MHz?) | * Oszillator TEUMCK 11.289 (MHz?) | ||
- | * CIRRUS 5341CZZ 1126 | + | * CIRRUS 5341CZZ 1126 https:// |
* kleines HF-Shield (HW25002): | * kleines HF-Shield (HW25002): | ||
* 25MHz-Quarz | * 25MHz-Quarz | ||
- | * 2x TERIDIAN 78Q2123, | + | * 2x TERIDIAN 78Q2123, Ethernet-PHYs, http:// |
* HanRun HY602458, Ethernet-Spulen | * HanRun HY602458, Ethernet-Spulen | ||
* Konnektor für Buttons (J25002) | * Konnektor für Buttons (J25002) | ||
+ | * Marvell G16 GOA2R https:// | ||
=== Power board === | === Power board === | ||
Line 52: | Line 55: | ||
* Cirrus Logic CS44800-CQZ https:// | * Cirrus Logic CS44800-CQZ https:// | ||
* 8-Channel Digital Amplifier Controller | * 8-Channel Digital Amplifier Controller | ||
+ | * "The control port has 2 modes: SPI and I2C, with the CS44800 acting as a slave device. SPI mode is selected if there is a high to low transition on the AD0/CS pin, after the RST pin has been brought high. I2C mode is selected by connecting the AD0/CS pin through a resistor to VLC or GND, thereby permanently selecting the desired AD0 bit address state." | ||
* Oszillator 25.000MHz | * Oszillator 25.000MHz | ||
* TI N5532 https:// | * TI N5532 https:// | ||
+ | * NE5532x, SA5532x Dual Low-Noise Operational Amplifiers | ||
+ | |||
+ | |||
+ | Refer: | ||
+ | https:// | ||
+ | === Logic Connector === | ||
+ | | GND | 1 | 2 | ? | | ||
+ | | GND | 3 | 4 | ? | | ||
+ | | GND | 5 | 6 | CAPACITOR to CS44800 VLS | | ||
+ | | GND | 7 | 8 | 3.3V | | ||
+ | | GND | 9 | 10 | 3.3V | | ||
+ | | GND | 11 | 12 | 3.3V | | ||
+ | | GND | 13 | 14 | ? | | ||
+ | | GND | 15 | 16 | 12V | | ||
+ | | GND | 17 | 18 | ? | | ||
+ | | GND | 19 | 20 | ? | | ||
+ | | GND | 21 | 22 | ? | | ||
+ | | GND | 23 | 24 | ? | | ||
+ | | GND | 25 | 26 | ? | | ||
+ | | GND | 27 | 28 | SYS_CLK, DAI_MCLK | ||
+ | | GND | 29 | 30 | GND | | ||
+ | | GND | 31 | 32 | CS44800 LRCLK (in) | | ||
+ | | GND | 33 | 34 | CS44800 DAI_SDIN1 (out) | | ||
+ | | GND | 35 | 36 | CS44800 SDC/CCCLK (out) | | ||
+ | | GND | 37 | 38 | CS44800 SDA/CDOUT (both) | | ||
+ | | GND | 39 | 40 | CS44800 INT (in) | | ||
+ | | GND | 41 | 42 | CS44800 RST (out) | | ||
+ | | GND | 43 | 44 | 3.3V CS44800 MUTE? | | ||
+ | | GND | 45 | 46 | GND | | ||
+ | | GND | 47 | 48 | ? | | ||
+ | | GND | 49 | 50 | ? | | ||
+ | |||
+ | Other reference: | ||
+ | https:// | ||
=== Button board === | === Button board === | ||
+ | |||
+ | ==== Software ==== | ||
+ | === Bootup === | ||
+ | |||
+ | * u-boot 1.1.1 | ||
+ | * uart-console | ||
+ | * Pinout: | ||
+ | * 3.3V | ||
+ | * RX | ||
+ | * TX | ||
+ | * GND | ||
+ | * Early Boot output: < | ||
+ | |||
+ | U-Boot 1.1.1(1-16-4-zp5s-0.5), | ||
+ | |||
+ | MPC8272 Reset Status: External Soft, External Hard | ||
+ | |||
+ | MPC8272 Clock Configuration | ||
+ | - Bus-to-Core Mult 3x, VCO Div 4, 60x Bus Freq 16-50 , Core Freq 50-150 | ||
+ | - dfbrg 1, corecnf 0x10, busdf 3, cpmdf 1, plldf 0, pllmf 3 | ||
+ | - vco_out | ||
+ | - cpu_clk | ||
+ | - pci_clk | ||
+ | |||
+ | CPU: | ||
+ | Board: Sonos ZP5S | ||
+ | DRAM: 32 MB | ||
+ | IMMR: f0000000 | ||
+ | DRAM tests running ... done | ||
+ | Using default environment | ||
+ | |||
+ | In: serial | ||
+ | Out: | ||
+ | Err: | ||
+ | Net: FCC1 ETHERNET, FCC2 ETHERNET | ||
+ | Hit any key to stop autoboot: | ||
+ | NAND ID is 20:75 | ||
+ | 32M NAND flash (ST NAND256W3A) | ||
+ | S0 provisionally good, KP=1, G25 | ||
+ | S1 provisionally good, KP=4, G24 | ||
+ | Boot from partition 1 | ||
+ | ## Starting application at 0x00400000 ..�����������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������.............................. | ||
+ | |||
+ | </ | ||
+ | |||
+ | === JTAG === | ||
+ | To be analysed | ||
+ | |||
+ | REFER: | ||
+ | https:// | ||
+ | |||
+ |