====== sonos-play5 ======

<WRAP right>
^ sonos-play5  ||
^ Git | [[https://gitlab.aachen.ccc.de]] |
^ Inventar | [[https://inv.aachen.ccc.de|Gegenstand im Inventar]] |
^ Host | [[infrastruktur:host|host, host.server.aachen.ccc.de]] |
^ Kontakt | [[wiki:user:jn |jn ]][[wiki:user:cpresser |cpresser ]][[wiki:user:mimoja |mimoja ]] |
^ Status | <fc green>aktiv</fc> (2018-09-16 20:57) |
^ Interessenten | |
</WRAP>

===== Aktivitätsstatus des Projekts (subjektive Einschätzung), mögliche Werte =====

Mimoja hat einen Lautsprecher mit Netzwerk, und bastelt daran.



==== Hardware ====

=== CPU board ===

  * Großes HF-Shield mit CPU/RAM (HW25000)
    * Freescale MPC8247VRPIEA https://www.nxp.com/docs/en/data-sheet/MPC8272EC.pdf
    * 2x Samsung-RAM, K4S281632-LC75 
      * je 128Mbit SDRAM https://pdf1.alldatasheet.com/datasheet-pdf/view/37065/SAMSUNG/K4S281632B/+25177UOYlSuOpdxvZvGvGEEx+/datasheet.pdf
    * Oszillator 100MHz
    * Konnektor J25004, UART, 38400 baud
      * pin 2: TX
  * Mini-PCI-Slot für WLAN (J25000)
  * Großes HF-Shield mit Flash (HW25001)
    * cFeon EN39LV010 https://download.maritex.com.pl/pdfs/sc/EN39LV010.pdf
      * "1 Megabit (128K x 8-bit ) 4 Kbyte Uniform Sector, CMOS 3.0 Volt-only Flash Memory"
    * ST NAND256W3A2BN6 http://pdf1.alldatasheet.com/datasheet-pdf/view/94408/STMICROELECTRONICS/NAND256W3A2BN6.html
      * 256 = 256Mbit
      * W = 3.3V
      * 3 = bus width x8
      * A = 528 Bytes/ 264 Word Page
      * 2 = Chip Enable Don’t Care Enabled
      * B = Second Version
      * N = TSOP48 12 x 20mm (all devices)
      * 6 = –40 to 85 °C
      * blank = Standard Packing
  * Oszillator TEUMCK 11.289 (MHz?)
  * CIRRUS 5341CZZ 1126 https://statics.cirrus.com/pubs/proDatasheet/CS5341_F2.pdf
  * kleines HF-Shield (HW25002):
    * 25MHz-Quarz
    * 2x TERIDIAN 78Q2123, Ethernet-PHYs, http://www.farnell.com/datasheets/38194.pdf
  * HanRun HY602458, Ethernet-Spulen
  * Konnektor für Buttons (J25002)
  * Marvell G16 GOA2R https://datasheet.octopart.com/MDT-G16-A0-Marvell-datasheet-17899646.pdf

=== Power board ===

  * Cirrus Logic CS44800-CQZ https://media.digikey.com/pdf/Data%20Sheets/Cirrus%20Logic%20PDFs/CS44800.pdf
    * 8-Channel Digital Amplifier Controller
    * "The control port has 2 modes: SPI and I2C, with the CS44800 acting as a slave device. SPI mode is selected if there is a high to low transition on the AD0/CS pin, after the RST pin has been brought high. I2C mode is selected by connecting the AD0/CS pin through a resistor to VLC or GND, thereby permanently selecting the desired AD0 bit address state."
  * Oszillator 25.000MHz
  * TI N5532 https://www.ti.com/lit/ds/symlink/ne5532.pdf
    * NE5532x, SA5532x Dual Low-Noise Operational Amplifiers


Refer:
https://sites.google.com/site/sonosdebug/power-topology
=== Logic Connector ===
| GND |  1 | 2  | ? | 
| GND |  3 | 4  | ? |
| GND |  5 | 6  | CAPACITOR to CS44800 VLS |
| GND |  7 | 8  | 3.3V |
| GND |  9 | 10 | 3.3V |
| GND | 11 | 12 | 3.3V |
| GND | 13 | 14 | ?    |
| GND | 15 | 16 | 12V  |
| GND | 17 | 18 | ?    |
| GND | 19 | 20 | ?    |
| GND | 21 | 22 | ?    |
| GND | 23 | 24 | ?    |
| GND | 25 | 26 | ?    |
| GND | 27 | 28 | SYS_CLK, DAI_MCLK   |
| GND | 29 | 30 | GND  |
| GND | 31 | 32 | CS44800 LRCLK (in)       |
| GND | 33 | 34 | CS44800 DAI_SDIN1 (out)  |
| GND | 35 | 36 | CS44800 SDC/CCCLK (out)  |
| GND | 37 | 38 | CS44800 SDA/CDOUT (both) |
| GND | 39 | 40 | CS44800 INT (in)         |
| GND | 41 | 42 | CS44800 RST (out)        |
| GND | 43 | 44 | 3.3V CS44800 MUTE? |
| GND | 45 | 46 | GND  |
| GND | 47 | 48 | ?    |
| GND | 49 | 50 | ?    |

Other reference:
https://sites.google.com/site/sonosdebug/board-to-board-connector

=== Button board ===

==== Software ====
=== Bootup ===

  * u-boot 1.1.1
  * uart-console
  * Pinout:
    * 3.3V
    * RX
    * TX
    * GND
  * Early Boot output: <code>

U-Boot 1.1.1(1-16-4-zp5s-0.5), Build: zp5s-0.5

MPC8272 Reset Status: External Soft, External Hard

MPC8272 Clock Configuration
 - Bus-to-Core Mult 3x, VCO Div 4, 60x Bus Freq  16-50 , Core Freq  50-150
 - dfbrg 1, corecnf 0x10, busdf 3, cpmdf 1, plldf 0, pllmf 3
 - vco_out  400000000, scc_clk  100000000, brg_clk   25000000
 - cpu_clk  300000000, cpm_clk  200000000, bus_clk  100000000
 - pci_clk   33333333

CPU:   MPC8272 (HiP7 Rev 14, Mask unknown [immr=0x0d10,k=0x00e1]) at 300 MHz
Board: Sonos ZP5S
DRAM:  32 MB
IMMR: f0000000
DRAM tests running ... done
Using default environment

In:    serial
Out:   serial
Err:   serial
Net:   FCC1 ETHERNET, FCC2 ETHERNET
Hit any key to stop autoboot:  0 
NAND ID is 20:75
32M NAND flash (ST NAND256W3A)
S0 provisionally good, KP=1, G25
S1 provisionally good, KP=4, G24
Boot from partition 1
## Starting application at 0x00400000 ..�����������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������..............................

</code>

=== JTAG ===
To be analysed

REFER:
https://sites.google.com/site/sonosdebug/jtag-connection